Home Synthesized Clock Generator SRS CG635 Synthesised Clock Generator

SRS CG635 Synthesised Clock Generator

Availability: Awaiting stock
Please contact us for estimated delivery


Product Code:
14927
Manufacturer: Stanford Research Systems
Special Price £3,923.65 £4,708.38 Regular Price £4,045.00 £4,854.00

- Clocks from 1 µHz to 2.05 GHz
- Random jitter less than 1 ps rms
- 16 digits of frequency resolution
- 80 ps rise and fall times
- CMOS, PECL, ECL, LVDS, RS-485 outputs
- Phase control and time modulation
- PRBS for eye-pattern testing (opt.)
- OCXO and rubidium timebase (opt.)

More info and finance questions

Lambda Exclusive Promotion:
Additional 12 months warranty for free (2 years total) via our UK Service Centre.

The Stanford Research Systems CG635 generates extremely stable square wave clocks between 1 µHz and 2.05 GHz. The instrument's high frequency resolution, low jitter, fast transition times, and flexible output levels make it ideal for use in the development and testing of virtually any digital component, system or network.

Clean clocks are critical in systems that use high-speed ADCs or DACs. Spurious clock modulation and jitter create artifacts and noise in acquired signals and in reconstructed waveforms. Clean clocks are also important in communications systems and networks. Jitter, wander, or frequency offsets can lead to high bit error rates, or to a total loss of synchronization. The SRS CG635 can provide the clean, stable clocks required for the most critical applications.

Output drivers

The CG635 has several clock outputs. The front-panel Q and -Q outputs provide complementary square waves at standard logic levels (ECL, PECL, LVDS or +7 dBm). The square wave amplitude may also be set from 0.2 V to 1.0 V, with an offset between -2 V and +5 V. These outputs operate from DC to 2.05 GHz, have transition times of 80 ps, a source impedance of 50 Ohms, and are intended to drive 50 Ohm loads. Output levels double when these outputs are unterminated.

The front-panel CMOS output provides square waves at standard logic levels. The output may also be set to any amplitude from 0.5 V to 6.0 V. The CMOS output has transition times of less than 1 ns and operates up to 250 MHz. It has a 50 Ohm source impedance and is intended to drive high impedance loads at the end of any length of 50 Ohm coax cable.

A rear-panel RJ-45 connector provides differential square wave clocks on twisted pairs at RS-485 levels (up to 105 MHz) and LVDS levels (up to 2.05 GHz). This output also provides ±5 VDC power for optional line receivers (CG640 to CG649). The clock outputs have 100 Ohm source impedances and are intended to drive shielded CAT-6 cable with 100 Ohm terminations. The differential clocks may be used directly by the target system, or with optional line receivers that provide complementary logic outputs on SMA connectors.

Timebases

The standard crystal timebase has a stability of better than 5 ppm. The CG635’s 10 MHz timebase input allows the instrument to be phase-locked to an external 10 MHz reference. The 10 MHz output may be used to lock two CG635s together.

There are two optional timebases. An oven-controlled crystal oscillator (OCXO) provides about 100 times better frequency stability than the standard crystal oscillator. A rubidium frequency source provides about 10,000 times better stability. Either optional timebase will substantially reduce the low-frequency phase noise of the synthesized output.

Phase & Time Modulation

The clock phase can be adjusted with high precision. The phase resolution is one degree for frequencies above 200 MHz, and increases by a factor of ten for each decade below 200 MHz, with a maximum resolution of one nano-degree. This allows clock edges to be positioned with a resolution of better than 14 ps at any frequency between 0.2 Hz and 2.05 GHz.

The timing of clock edges can be modulated over ±5 ns via a rear-panel time-modulation input. The input has a sensitivity of 1 ns/V and a bandwidth from DC to over 10 kHz, allowing an analog signal to control the phase of the clock output. This feature is very useful for characterizing a system's susceptibility to clock modulation and jitter.

Applications

With its exceptionally low phase noise and high frequency resolution, the CG635 replaces RF signal generators in many applications. Front-panel outputs provide square waves up to +7 dBm — ideal for driving RF mixers. Should your application require sine waves, in-line low-pass filters are commercially available to convert the CG635's square wave outputs to low distortion sine wave outputs.

The CG635 can provide a wide range of clean, precise clocks for the most critical timing requirements. The instrument is an essential tool for demonstrating a system's performance with a nearly ideal clock, and for understanding a system's susceptibility to a compromised clock. The CG635 has the frequency range, precision, stability, and jitter-free performance needed to fulfill all your clock requirements.

 

Frequency  
Range DC, 1 µHz to 2.05 GHz
Resolution 16 digits (f ≥ 10 kHz), 1 pHz (f < 10 kHz)
Accuracy Δf < ±(2× 10-19 + timebase error) × f
Settling time  
   
   
Timebase (20 °C to 30 °C)  

Stability

 

<5 ppm (std. timebase)
<0.01 ppm (opt. 02 OCXO)
<0.0001 ppm (opt. 03 Rb timebase)

 

 

Aging  
  <0.2 ppm/year ( opt. 02 OCXO)
  <0.0005 ppm/year ( opt. 03 Rb timebase)
External input 10 MHz ± 10 ppm, sine >0.5 Vpp, 1 kΩ
Output 10 MHz, 1.41 Vpp sine into 50Ω
   
   
Phase Noise (at 622.08 MHz)  
100 Hz offset < -90 dBc/Hz
1 kHz offset < -100 dBc/Hz
10 kHz offset < -100 dBc/Hz
100 kHz offset < -110 dBc/Hz
   
   
Jitter and Wander  
Jitter (rms)  
Wander (p-p)  
   
   
Time Modulation (Rear-panel input, 1 kΩ)  
Sensitivity 1 ns/V, ±5 %
Range ±5 ns
Bandwidth DC to greater than 10 kHz
   
   
Phase setting  
Range ±720° (max. step size ±360°)
Resolution  
Slew time  
   
   
Q and -Q Outputs  
Outputs Front-panel BNC connectors
Frequency range DC to 2.05 GHz
High level -2.00 V ≤ VHIGH ≤ +5.00 V
Amplitude 200 mV ≤ VAMPL ≤ 1.00 V
  (VAMPL ≡ VHIGH - VLOW)
Level resolution 10 mV
Level error  
Transition time  
Symmetry  
Source impedance 50 Ω(±1 %)
Load impedance 50 Ω to ground on both outputs
Pre-programmed levels PECL, LVDS, +7 dBm, ECL
   
   
CMOS Output  
Output Front-panel BNC
Frequency range DC to 250 MHz
Low level -1.00 V ≤ VLOW ≤ +1.00 V
Amplitude 500 mV ≤ VAMPL ≤ 6.00 V
  (VAMPL ≡ VHIGH - VLOW)
Level resolution 10 mV
Level error  
Transition time  
Symmetry  
Source impedance 50 Ω (reverse terminates cable reflection)
Load impedance Unterminated 50 Ω cable of any length
Attenuation (50 Ω load) Output levels are divided by 2
Pre-programmed levels 1.2, 1.8, 2.5, 3.3 or 5.0 V
   
   
RS-485 Output  
Output Rear-panel RJ-45
Frequency range DC to 105 MHz
Clock output Pin 7 and pin 8 drive twisted pair
Source impedance 100 Ω between pin 7 and pin 8
Load impedance 100 Ω between pin 7 and pin 8
Logic levels VLOW = +0.8 V, VHIGH = +2.5 V
Recommended cable Straight-through Category-6
   
   
LVDS Output (EIA/TIA-644)  
Output Rear-panel RJ-45
Frequency range DC to 2.05 GHz
Transition time  
Clock output Pin 1 and pin 2 to drive twisted pair
Source impedance 100 Ω between pin 1 and pin 2
Load impedance 100 Ω between pin 1 and pin 2
Logic levels VLOW = +0.96 V, VHIGH = +1.34 V
Recommended cable Straight-through Category-6
   
   
PRBS (Opt. 01) (EIA/TIA-644)  
Outputs PRBS, -PRBS, CLK and -CLK
Frequency range DC to 1.55 GHz
Level LVDS on rear-panel SMA jacks
PRBS generator x7 + x6 + 1 for a length of 27 - 1 bits
Transition time  
Load impedance 50 Ω to ground on all outputs
   
   
General  
Computer interfaces GPIB and RS-232 std. All functions can be
  controlled through either interface.
Non-volatile memory Ten sets of instrument configurations can
  be stored and recalled.
Power 90 to 264 VAC, 47 to 63 Hz, 50 W
Dimensions, weight 8.5× 3.5 × 13 (WHL), 9 lbs.
Warranty One year parts and labor on defects in
  materials and workmanship
Write Your Own Review
You're reviewing:SRS CG635 Synthesised Clock Generator
Your Rating
PhotoProduct Price